1. Field of the Invention
This invention relates to the formation of resistive switching memory devices.
2. Description of the Related Art
Nonvolatile memory devices are used in systems in which persistent storage is required. For example, nonvolatile memory cards are used in digital cameras to store images and in digital music players to store audio data. Nonvolatile memory devices are also used to persistently store data in computer environments.
Electrically-erasable programmable read only memory (EEPROM) technology is often used to form and program nonvolatile memory devices. This type of nonvolatile memory contains floating gate transistors that can be selectively programmed or erased by application of suitable voltages to their terminals. As fabrication techniques improve, it is becoming possible to fabricate nonvolatile memory devices with increasingly smaller dimensions. However, as device dimensions shrink, scaling issues pose challenges for traditional nonvolatile memory technology. This has led to the investigation of other alternatives, including nonvolatile resistive switching memory technology.
Nonvolatile resistive switching memory device and system are formed using memory cells that have two or more stable resistances states. Voltage pulses are used to switch the resistive switching memory element from one resistance state to the other. For example, a bistable memory cell having a resistive switching memory element with two stable resistance states can be placed in a high resistance state or a low resistance state by applying suitable voltages or currents. Nondestructive read and write operations can be performed to ascertain the value of a data bit that is stored in a memory cell.
Resistive switching based on having a resistive switching memory element formed of transition metal oxide (MO) films within a memory cell has been demonstrated. A current steering element (typically a diode and/or resistor) can sometimes be integrated into a resistive switching memory element to direct current flow in a memory cell. Since the overall power that can be delivered to a circuit containing a series of connected memory cells with resistive switching memory elements and current steering elements is typically limited in most conventional nonvolatile memory devices (e.g., CMOS driven devices), it is desirable to form each of the resistive switching memory elements and current steering elements in the circuit so that the voltage-drop across each of these elements is small, and thus the overall resistance of the series of these connected elements does not cause the current to decrease to an undesirable level when a high voltage level (e.g., ˜2-5 volts) is applied.
As the sizes of the nonvolatile memory device shrink, it is important to reduce the required currents and voltages that are necessary to reliably set, reset and/or determine the desired “On” and “Off” states of the memory device to minimize the overall power consumption of a memory chip as well as resistive heating of the devices within the memory chip and cross-talk between adjacent memory devices. Moreover, it becomes increasing necessary to assure that the “set” and “reset” currents used to change the resistance state of the resistive switching memory element are not too large to alter the electrical or physical properties of the one or more layers found in the interconnected memory devices. A large current flowing through the current carrying lines in a memory array can also undesirably alter or disturb the “logic” state of the interconnected memory cells/devices or possibly damage portions of the adjacently connected memory devices, due to an appreciable amount of “cross-talk” between the formed devices.
Thus, there is a need to limit and/or minimize the required current used to sense and program the logic states of each of the interconnected memory devices, in an effort to reduce chip overall power consumption as well as improve device longevity and reduce the chance that cross-talk between adjacently connected devices. Therefore, it is desirable to form a nonvolatile memory device with a current-limiting material layer and a current-reducing material layer to minimize programming currents used when switching the device between the “on” and “off” states.